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VisualApplets 3

Realizing Real-time Vision Individually

VisualApplets is the integrated development environment for real-time applications on FPGA-processors in image processing. This solution is used in numerous industrial applications and in a variety of industries. VisualApplets opens up access to FPGA processors in image processing hardware—such as frame grabbers, industrial cameras, and image processing devices—to realize individual image processing applications.

The approach of representing FPGA programming by data flow models on a graphical user interface makes it easy for hardware and software developers and application engineers to create applet designs for complex image processing tasks intuitively and in a short period of time — even with no hardware programming experience. All programmed applications are carried out on the FPGA hardware in real-time.

In the year of its initial release, VisualApplets was honored with the International Vision Award for 2006 and has enjoyed success ever since.

Benefits of Graphical FPGA Programming for Real-time Applications

  • Grapical User Interface
    • For simple drag and drop applet design creation
    • Even complex applications for FPGAs can be generated easily using data flow models
  • Operator Libraries
    • Over 200 operators, grouped in libraries
    • Access to diverse operators to generate applet designs for almost all demands in image processing
  • Configurable Libraries
    • Creation of own libraries for commonly used image processing steps or by importation from available hardware code
    • Flexible development and re-use of needed functions
  • Easy Porting
    • Easy porting of applet designs onto other frame grabbers or image processing devices using integrated conversion function
    • Rapid prototyping can be started on a high- performance frame grabber and converted to the most economical platform once design is completed
  • Design Rules Check
    • “Design Rules Check” automatically checks the conformity of the created applet design against design rules. Possible solutions are offered (visual debugging).
    • Users concentrate on their tasks at hand and need not concern themselves with debugging
  • Inheritance of Parameters

    • Parameter changes are corrected via inheritance in the overall design
    • Automated applet design adaptation in the event of parameter changes
  • Display of the Available FPGA Logic
    • Display of the resource consumption of single operators and design elements from the available FPGA logic with every design change
    • Bandwidth analyses indicate bottlenecks in the design that could, for example, be rectified in a graphic configuration by increasing parallelism
  • Display of Transport Links' Bandwidth
    • For all links, detailed information on available and required bandwidth is accessible context-sensitively
  • High-level Simulation
    • Functionality testing of the applet design using high level simulation that calculates the visual interim result at every step with bit precision for visual debugging
    • Easy check of design results by an immediate preview image at every design step to verify created algorithms and image processing steps down to the pixel
  • Programming of the Signal Control
    • Enables communication and control of cameras and attached peripherals
    • Data signals and connections to external interfaces (peripherals) can be graphically programmed and processed
  • SDK Output
    • SDK output generates operational sample code in C++, including parameters
    • The registers of image processing functionality can be controlled using its own software
  • Hardware Independence
    • VisualApplets is independent from the target hardware
    • Image processing functions can be implemented independent of the camera manufacturer

Every VisualApplets delivery includes arithmetic and morphological operators for pixel manipulation, logical operators for classification tasks, complex modules for color processing, operators for statistical image analysis, and processing of image sequences, among others. Additional operators are responsible for format conversion, compression or conversion to pixel lists. Special features include control signal programming to individualize trigger functionality as well as segmentation and classification functions in the blob analysis operator.

Pricing, Availability and Ordering

  • Concurrent EDA is a US Reseller for Silicon Software.
  • Currently Available to US customers only.
  • Please email Ray at This e-mail address is being protected from spambots. You need JavaScript enabled to view it with questions / quotes / orders.

Contact

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