HSR-PRP Switch Core



This IP implements bumpless Ethernet connectivity ensuring zero-delay recovery time in case of network failure and no-frame lost.  The IP supports version 3 of High-availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) with redundant IEEE 1588-2008. The flexibility and scalability of this IP offers optimized solutions for cost-sensitive CPU-less equipments and for high-end complex MPSoC based networking platforms.

It is a flexible solution for the Energy Market Equipment that will be connected to HSR rings, PRP Lans, or will work as Network bridges in the context of IEC 61850.

Key Features


  • Full-duplex 10/100/1000 Mbps Ethernet Interfaces
  • MII/RMII/GMII/RGMII/SGMII/QSGMII Physical Layer device (PHY) interfaces
  • Different data rate supported for each port
  • Copper and Fiber optic media interfaces: 10/100/1000Base-T, 100Base-FX, 1000Base-X


  • It switches frames by hardware. This feature offers high switching speeds, needed to fulfill the Maximum Allowed Age and Data Integrity set for Process Bus and Inter-bay Bus in Electric Substation Automation
  • The processing architecture has been designed specifically for HSR/PRP. Forwarding latencies in range of 500ns for Gigabit Ethernet
  • It is an all-hardware. There is no need for on-chip microprocessor nor software stack
  • It has been optimized to require few logic resources in order to allow the implementation on low-cost FPGA devices
  • Jumbo Frame Management

Time Synchronization

  • It supports IEEE 1588-2008 v2 combined with SoC-e 1588 IP cores


  • It can be used to implement End-Node DAN, RedBox or QuadBox functionalities
  • It has been provided with a single flag that switches between PRP and HSR modes by software
  • It includes complete statistics and error registers for each port integrated (Network Supervision)
  • Supported HSR modes: H, N, T, U,X
  • Supported PRP modes: Duplicates Discard, Duplicates Accept
  • HSR-HSR, HSR-PRP supported modes for seamless PRP-HSR networks merging and Quadbox operation
  • VLAN support and HSR Rings ID
  • SMNP and MIB Table available


  • MDIO, UART, AXI4-Lite or CoE (Configuration-over-ethernet) management interfaces
  • Configuration-over-Ethernet (COE): Full access to internal registers through the same Ethernet link that connects to the CPU
  • Drivers are provided with IP Core purchase
HSR-PRP I/O Diagram

Supported FPGAs

  • 6-Series (Spartan, Virtex)
  • 7-Series (Zynq, Spartan, Artix, Kintex, Virtex)
  • Ultrascale (Kintex, Virtex)
  • Ultrascale+ (Zynq MPSoC, Kintex, Virtex)

Embedded Development Suite

A hardware development platform is available. Latest documentation, design support files, reference design source files and tools are available for download free of charge.

* Device supported by the free Xilinx Vivado WebPACK tool.

Pricing, Availability and Ordering

  • Concurrent EDA is the US Distributor for SoC-e.
  • Currently Available to US customers only.
  • Please email Ray at This e-mail address is being protected from spambots. You need JavaScript enabled to view it with questions / quotes / orders.


5001 Baum Blvd Ste 640
Pittsburgh PA 15213