Networking Cores

The integration of Ethernet Switches on FPGA is simplifying the communication between heterogeneous systems and applications. Thanks to the flexibility of reconfigurable devices combined with networking IPs, the end-equipment embeds not only Ethernet end-point capabilities but added-value switching features as well. In addition, the low latency of SoC-e IPs implemented over a non-blocking matrix infrastructure is a robust base for networking in critical systems. IEEE 1588-2008 is also supported and even the P2P mode of operation is implemented by hardware. This feature ensures port scalability and simplifies the integration of the IP. SoC-e has developed a portfolio of Ethernet Switching IPs focused on different applications and sectors. Thus, it is feasible combining the features of different IPs to obtain an optimal solution for each case.

Available ModelsDescription
HSR/PRP Switch IP This IP implements bumpless Ethernet connectivity ensuring zero-delay recovery time in case of network failure and no-frame lost.
Managed Redundant Switch (MRS) IP The ManagedRedundantSwitch IP core is a combination of SoC-e HSR-PRPSwitch (HPS) and ManagedEthernetSwitch (MES) IP cores offering a redundant Ethernet switch capability.
Managed Ethernet Switch (MES) IP The Managed Ethernet Switch IP core features a non-blocking crossbar matrix that allows continuous transfers between all the ports.
Unmanaged Ethernet Switch (UES) IP The Unmanaged Ethernet Switch IP core (UES) implements a plug-and-play Ethernet switch on reconfigurable devices.
Multiport TSN Switch (MTSN) IP The MTSN switch core provides precise time synchronization of network nodes to a reference time.

Multiport TSN Switch (MTSN)

10M/100M/1G Multiport TSN Ethernet Switch IP Core

Main Art

OVERVIEW

MTSN is a multi-port, multi-rate managed Ethernet switch with Time-Sensitive Networking (TSN) capabilities that delivers guaranteed bandwidth and deterministic latency.

With a rich set of layer-2 configurable features, both at synthesis time & during runtime, MTSN allows building advanced Ethernet switch systems with TSN capabilities. MTSN switch has been designed to address the maximum throughput using optimized resources.

All these characteristics enable a wide number of applications/sectors where the use of MTSN IP Core is key. Automotive, Marine, Aerospace, Defence or Electric are examples of markets where our customers are already applying this technology.

KEY FEATURES

1. Time-Sensitive Networking (TSN) support

Aligned with the different TSN profiles, such as Aerospace (P802.1DP), Automotive (P802.1DG) or Industrial Automation (IEC/IEEE 60802).

2. Ethernet Switch IP “builder”

Hundreds of user-configurable parameters allow obtaining the exact switch configuration required by the customer, ensuring efficient use of the available programmable logic resources.

3. Different Data-Rate Per Port

Each port speed and interface can be assigned independently.

4. High Performance

Up-to 1G interfaces without HOL (Head-of-line) blocking effect.

5. Fast & Smooth Integration

GUI available for some FPGA vendor tools (i.e., AMD Vivado™ Design Suite). Drivers & software components included as part of the product deliverable.

6. Evaluation Version Available

Encrypted, time-limited version available.

Technical Specifications

Communication Interface

  • Integrated 10M/100M/1000M MACs for 10/100 Mbps and 1 Gbps PHY interface rates to use with any PHY interface type (e.g. MII, RMII, GMII, RGMII) depending on application
  • Compatible with SGMII (Serial Gigabit Media Independent Interface) or QSGMII (Quad Serial Gigabit Media Independent Interface) PHY interfaces through an internal GMII-based connection to AMD LogiCORE™ SGMII/QSGMII IP cores
  • 10/100/1000 Mbps AXI-Stream interface with a data width of 8 bits @ 125 MHz

Time Sensitive Networking (TSN)

  • TSN features can be enabled/disabled independently
  • IEEE 802.1AS – Timing and Synchronization (gPTP)
  • IEEE 802.1Qav – Credit Based Shaper (CBS)
  • IEEE 802.1Qbv – Time Aware Shaper (TAS)
  • IEEE 802.1Qci – Per-Stream Filtering and Policing (PSFP)
  • IEEE 802.1CB – Frame Replication and Elimination for Reliability (FRER)
  • IEEE 802.1Qbu / IEEE 802.3br – Frame Preemption
  • IEEE 802.1Qcc – Stream Reservation Protocol (SRP) Enhancements & Performance Improvements

Time Synchronization

  • Time Synchronization according to IEEE 802.1AS-2020 and IEEE 1588 (PTP)
    • Up to four IEEE 802.1AS time domains
  • Legacy PTP: IEEE 1588 Boundary Clock (BC) at Layer-2 and Layer-3 (IPv4)

Traffic Management

  • Integrated Ethernet switch fabric supporting up to 32 ports (number limited by device resources)
  • HoL (Head-of-Line) blocking-free switch fabric
  • Shared Dynamic and Static Filtering Database. Hardware MAC learning/ageing and look-up for up to ~9K MAC addresses (synthesis scalable) at wire speed
  • Independent VLAN Learning support
  • Searchable MAC addresses and associated info in Filtering Database
  • Programmable Frame Forwarding port mask
  • Programmable Ethertype-based Frame Forwarding
  • Static Multicast frame filtering; IGMP v1/v2 snooping (IPv4)
  • Standard frame size (1518 bytes) and Jumbo frames up to 9 kB (memory dependent)

Quality of Service

  • Up to 8 priority queues per port (synthesis option)
    • Priority classification based on PCP (802.1p), DSCP (IPv4 TOS / IPv6 COS), and EtherType
    • Programmable remapping from PCP/DSCP to internal queues per-port
    • Programmable priority regeneration per-port
    • Egress prioritization via Strict Priority or Weighted Round Robin (WRR)
  • IEEE 802.1Q tag-based and port-based VLANs; VLAN insertion (rx) and removal/overwrite (tx)
  • MAC-level ingress frame filtering (dest MAC and/or EtherType) per-port
  • Token-bucket based ingress throughput rate limiting per-port
  • MAC-level ingress frame rate limiting per-port
  • Credit Based Shaper (CBS) egress throughput rate limiting per-port
  • Egress frame rate limiting per-port
  • Broadcast/Multicast storm protection

Network Management & Monitoring

  • IEEE 802.1D STP, 802.1w RSTP, 802.1s MSTP
  • Multisession port mirroring: ingress & egress; option to mirror only frames matching a data pattern
  • User/network port-level security via IEEE 802.1X and MAC-based filtering
  • Host access control by destination MAC and/or Ethertype
  • Per-port MAC and switch statistics
  • Multiple management interfaces for control/statistics registers (selectable at synthesis)
  • I2C master interface for external device configuration (e.g., EEPROM with non-volatile config)

Others

  • Distributed Switch Architecture (DSA) frame tagging for app-specific message merging/distribution
  • Exclusive forwarding of known protocol-specific or custom frames to/from management port

Technical Support, Verification & Deliverables

Technical Support

IP Licenses are provided along with a Technical Support package that ensures a direct communication channel with our highly experienced support engineers. This is vastly valued during customer product development & integration phases.

Verification

All our IP Cores are rigorously tested, hardware-validated and verified in real-life environments. A 3-phase IP product verification is applied:

  • Entity/Block-oriented simulation
  • Global-oriented simulation
  • In-hardware validation

Deliverables

  • Encrypted/Source RTL code
  • Software components: Drivers, configuration API & SW stacks
  • Documentation (IP Core and Software components)
  • (Optional) Networking Testbench Suite (NTS)
  • (Optional) AMD Vivado™ design suite example design

Evaluation & Design-in Kit

To evaluate MTSN in a plug & play platform, see the RelyUm Industrial TSN Switches and Endpoints family:

https://soc-e.com/relyum-industrial/tsn-switches-and-endpoint-switches/

DOWNLOAD: MTSN Brochure

MTSN-1 G (TSN) Ethernet Switch

MTSN Diagram 4

MTSN Diagram 5

Multiport TSN Switch (MTSN)

10M/100M/1G Multiport TSN Ethernet Switch IP Core

Main Art

OVERVIEW

MTSN is a multi-port, multi-rate managed Ethernet switch with Time-Sensitive Networking (TSN) capabilities that delivers guaranteed bandwidth and deterministic latency.

With a rich set of layer-2 configurable features, both at synthesis time & during runtime, MTSN allows building advanced Ethernet switch systems with TSN capabilities. MTSN switch has been designed to address the maximum throughput using optimized resources.

All these characteristics enable a wide number of applications/sectors where the use of MTSN IP Core is key. Automotive, Marine, Aerospace, Defence or Electric are examples of markets where our customers are already applying this technology.

KEY FEATURES

1. Time-Sensitive Networking (TSN) support

Aligned with the different TSN profiles, such as Aerospace (P802.1DP), Automotive (P802.1DG) or Industrial Automation (IEC/IEEE 60802).

2. Ethernet Switch IP “builder”

Hundreds of user-configurable parameters allow obtaining the exact switch configuration required by the customer, ensuring efficient use of the available programmable logic resources.

3. Different Data-Rate Per Port

Each port speed and interface can be assigned independently.

4. High Performance

Up-to 1G interfaces without HOL (Head-of-line) blocking effect.

5. Fast & Smooth Integration

GUI available for some FPGA vendor tools (i.e., AMD Vivado™ Design Suite). Drivers & software components included as part of the product deliverable.

6. Evaluation Version Available

Encrypted, time-limited version available.

Technical Specifications

Communication Interface

  • Integrated 10M/100M/1000M MACs for 10/100 Mbps and 1 Gbps PHY interface rates to use with any PHY interface type (e.g. MII, RMII, GMII, RGMII) depending on application
  • Compatible with SGMII (Serial Gigabit Media Independent Interface) or QSGMII (Quad Serial Gigabit Media Independent Interface) PHY interfaces through an internal GMII-based connection to AMD LogiCORE™ SGMII/QSGMII IP cores
  • 10/100/1000 Mbps AXI-Stream interface with a data width of 8 bits @ 125 MHz

Time Sensitive Networking (TSN)

  • TSN features can be enabled/disabled independently
  • IEEE 802.1AS – Timing and Synchronization (gPTP)
  • IEEE 802.1Qav – Credit Based Shaper (CBS)
  • IEEE 802.1Qbv – Time Aware Shaper (TAS)
  • IEEE 802.1Qci – Per-Stream Filtering and Policing (PSFP)
  • IEEE 802.1CB – Frame Replication and Elimination for Reliability (FRER)
  • IEEE 802.1Qbu / IEEE 802.3br – Frame Preemption
  • IEEE 802.1Qcc – Stream Reservation Protocol (SRP) Enhancements & Performance Improvements

Time Synchronization

  • Time Synchronization according to IEEE 802.1AS-2020 and IEEE 1588 (PTP)
    • Up to four IEEE 802.1AS time domains
  • Legacy PTP: IEEE 1588 Boundary Clock (BC) at Layer-2 and Layer-3 (IPv4)

Traffic Management

  • Integrated Ethernet switch fabric supporting up to 32 ports (number limited by device resources)
  • HoL (Head-of-Line) blocking-free switch fabric
  • Shared Dynamic and Static Filtering Database. Hardware MAC learning/ageing and look-up for up to ~9K MAC addresses (synthesis scalable) at wire speed
  • Independent VLAN Learning support
  • Searchable MAC addresses and associated info in Filtering Database
  • Programmable Frame Forwarding port mask
  • Programmable Ethertype-based Frame Forwarding
  • Static Multicast frame filtering; IGMP v1/v2 snooping (IPv4)
  • Standard frame size (1518 bytes) and Jumbo frames up to 9 kB (memory dependent)

Quality of Service

  • Up to 8 priority queues per port (synthesis option)
    • Priority classification based on PCP (802.1p), DSCP (IPv4 TOS / IPv6 COS), and EtherType
    • Programmable remapping from PCP/DSCP to internal queues per-port
    • Programmable priority regeneration per-port
    • Egress prioritization via Strict Priority or Weighted Round Robin (WRR)
  • IEEE 802.1Q tag-based and port-based VLANs; VLAN insertion (rx) and removal/overwrite (tx)
  • MAC-level ingress frame filtering (dest MAC and/or EtherType) per-port
  • Token-bucket based ingress throughput rate limiting per-port
  • MAC-level ingress frame rate limiting per-port
  • Credit Based Shaper (CBS) egress throughput rate limiting per-port
  • Egress frame rate limiting per-port
  • Broadcast/Multicast storm protection

Network Management & Monitoring

  • IEEE 802.1D STP, 802.1w RSTP, 802.1s MSTP
  • Multisession port mirroring: ingress & egress; option to mirror only frames matching a data pattern
  • User/network port-level security via IEEE 802.1X and MAC-based filtering
  • Host access control by destination MAC and/or Ethertype
  • Per-port MAC and switch statistics
  • Multiple management interfaces for control/statistics registers (selectable at synthesis)
  • I2C master interface for external device configuration (e.g., EEPROM with non-volatile config)

Others

  • Distributed Switch Architecture (DSA) frame tagging for app-specific message merging/distribution
  • Exclusive forwarding of known protocol-specific or custom frames to/from management port

Technical Support, Verification & Deliverables

Technical Support

IP Licenses are provided along with a Technical Support package that ensures a direct communication channel with our highly experienced support engineers. This is vastly valued during customer product development & integration phases.

Verification

All our IP Cores are rigorously tested, hardware-validated and verified in real-life environments. A 3-phase IP product verification is applied:

  • Entity/Block-oriented simulation
  • Global-oriented simulation
  • In-hardware validation

Deliverables

  • Encrypted/Source RTL code
  • Software components: Drivers, configuration API & SW stacks
  • Documentation (IP Core and Software components)
  • (Optional) Networking Testbench Suite (NTS)
  • (Optional) AMD Vivado™ design suite example design

Evaluation & Design-in Kit

To evaluate MTSN in a plug & play platform, see the RelyUm Industrial TSN Switches and Endpoints family:

https://soc-e.com/relyum-industrial/tsn-switches-and-endpoint-switches/

DOWNLOAD: MTSN Brochure

MTSN-1 G (TSN) Ethernet Switch

MTSN Diagram 4

MTSN Diagram 5

RELY-RB

4-port HSR/PRP/PTP Redbox Switch

Main Art

OVERVIEW

Critical systems demand time-aware high-availability networking. Moreover, the complexity of the modern network infrastructures in these premises overcomes the traditional concept of “managed” device.

RELY-RB is a new concept of intelligent device that integrates advanced field-proven technology for “Zero-Packet Loss” redundant Ethernet, sub-microsecond synchronization and cybersecurity. This device is able to merge the whole LAN with redundant networks, to interconnect PRP and HSR networks and to extend HSR rings via QuadBox operation.

KEY FEATURES

1. Full in-house design (SOC-E IP Cores) based on a reconfigurable platform, upgradable and customizable

2. Support for HSR/PRP “Zero-Packet Loss” redundancy and NTP/PTP sub-microsecond synchronization

3. Support for QuadBox operation modes: HSR-HSR, HSR-PRP.

4. Simplified management and monitoring via a user-friendly HTTPS web interface or SSH accessible CLI

 

Technical Specifications

Communication Interface

  • 2x 100/1000BASE-SFP HSR/PRP Ethernet ports
  • 2x 100/1000BASE-SFP Regular Ethernet ports (Redbox interlink)
  • 1x 10/100/1000BASE-T(X) Ethernet Service port
  • 1x PPS output (MCX connector)

 

Layer 2 Features

  • IEEE 802.3-2008 (Ethernet)
  • Automatic MAC address learning and aging
  • Static MAC Table
  • Port-Based Virtual LANs (VLANs):
    • Logical segmentation of network for optimal use of bandwidth
    • IEEE 802.1Q for VLAN tagging (up to 4K VLAN groups)
    • IEEE 802.1p for Class of Service (CoS) / Quality of Service (QoS)
  • Switching port mask for forwarding
  • Port rate limiting
  • Storm control for flooded broadcast, multicast and unicast
  • Layer 2 multicast filtering
  • Zero-Recovery Time redundancy:
    • Supported modes: H, N, U, HSR-SAN, PRP-HSR, HSR-HSR
    • Cut-through operation for the HSR ring to minimize the latency in the ring
    • High-availability Seamless Redundancy (HSR) – IEC 62439-3 Clause 5
    • Parallel Redundancy Protocol (PRP) – IEC 62439-3 Clause 4
      • Supported modes: Duplicate discard, duplicate accept, transparent reception, PRP-HSR
      • Store & Forward for PRP and Ethernet operation
  • Spanning Tree Protocol:
    • IEEE 802.1w (RSTP)

Synchronization

  • IEEE 1588-2008 v2 (PTPv2)
  • IEEE 1588 Stateless Transparent Clock (TC)
  • IEEE 1588 Ordinary Clock (Master-Slave)
  • NTP (Server/Client)

Security

  • IEEE 802.1X for port-based network access control
  • MAC port binding & authentication for login security
  • RADIUS authentication
  • RBAC (Role Based Access Control)
  • Selective ports disabling capability
  • Unsecure protocols disabling capability
  • Per port ingress port mirroring
  • HTTPS for web interface
  • Secure Shell (SSH) Protocol v2 for command line interface
  • Encryption/authentication & signature for firmware and bitstream

Configuration and Management

  • HTTPS web interface
  • SSHv2 command line interface (CLI)
  • SNMP V1/V2c/V3 protocol support
  • SNMP V3 encrypted authentication and access security
  • Encrypted and digitally signed firmware/bitstream upgrades
  • Saving and restoring configuration
  • Internal status monitoring and logging
  • Graphic representation of HSR/PRP network status
  • Statistics independent per port
  • In-band management via any Ethernet switch port or out-of-band via Ethernet service port

Processing

  • Xilinx Zynq-7000 SoC device:
    • 2x 32bit CPU ARM-Cortex-A9
    • 1x 28nm Programmable FPGA
  • 1GB DDR3 RAM memory
  • 16GB eMMC Flash memory
  • 256Mb QSPI Flash memory

Physical and Electrical

  • Fanless design and full metal enclosure
  • Dimensions (mm):
    • RELY-RB 12VDC: 105(W) | 164(D) | 44(H)
    • RELY-RB 48VDC & 125VDC: 105 (W) | 164 (D) | 75(H)
  • Weight: 1kg
  • Power input:
    • RELY-RB 12VDC: 9VDC to 30VDC
    • RELY-RB 48VDC: 36VDC to 75VDC
    • RELY-RB 125VDC: 36VDC to 150VDC
  • Operating temperature: -40°C to +70°C
  • Storage temperature: -40°C to +85°C
  • Optional mounting: DIN rail

 Warrenty

  • 2 Years

 Certifications

  • UNE-EN 61326-1:2013
  • UNE-EN 61326-2-1:2013
  • IEC 61850-3:2013

 

DOWNLOADS: Brochure RELY-RB (PDF)

 

GALLERY

RELY RB Gallery 1  RELY RB Gallery 2

 

RELY RB Gallery 3  RELY RB Gallery 4

 

HSR/PRP/PTP & IEC 61850 Testing and Validation

Main Art

OVERVIEW

The digitisation of the Electric sector and the emerging Smart Grids offer new opportunities to improve the management of the Utilities, and the protection and control devices installed in a substation or generation plant.

RelyUm Industrial test and validation products respond to these new opportunities by delivering innovative, powerful and flexible features in a compact and rugged design. With these solutions, users can save time, effort and engineering costs, streamline processes and improve safety.

 

Technologies

“Zero-Packet-Loss” redundancy protocols:

IEC 62439-3 v3 Clause 5: High availability Seamless Redundancy (HSR)

   Modes: H, N, T, U, HSR-SAN, PRP-HSR, HSR-HSR

 

IEC 62439-3 v3 Clause 4: Parallel Redundancy Protocol (PRP)

   Modes: Duplicate discard, duplicate accept

IEEE 1588-2008 PTPv2:

Modes: Transparent Clock, Ordinary Clock, Boundary Clock

IEEE 1588 Stateless Transparent Clock P2P mode to support

IEC 61850-10: Conformance testing

 

Applications

Products included in this section can be used in a variety of applications in Ethernet networks and other systems implementing standards such as HSR/PRP, PTP or IEC 61850 series:

IEC 61850 conformance testing

Functional testing for FAT and SAT commissioning 

Remote testing of IEC 61850 standard based devices 

Substation and other Ethernet networks maintenance and troubleshooting

 

 

Products

 

 

 

 

RELY-REC

Form Factor

Standalone Box

 Communication Interfaces

3x 1G SFP ports, 1x 1G service port

 Networking

Ethernet, HSR/PRP

Synchronization

PTP (IEEE 1588), NTP

 Cybersecurity Secure Upgrade, RBAC

 Other Features Event Monitoring, timestamping & traffic recording

 

Products

 

 

 

 

RELY-TEST

Form Factor

Standalone Box

 Communication Interfaces

2x 1G SFP ports, 1x 1G service port

 Networking

Ethernet, HSR/PRP

Synchronization

PTP (IEEE 1588), NTP

 Cybersecurity Secure Upgrade, RBAC

 Other Features SX&GOOSE injection, IEC 61850 Client, MMS Reports

Multiport TSN Switch (MTSN)

10M/100M/1G Multiport TSN Ethernet Switch IP Core

Main Art

OVERVIEW

MTSN is a multi-port, multi-rate managed Ethernet switch with Time-Sensitive Networking (TSN) capabilities that delivers guaranteed bandwidth and deterministic latency.

With a rich set of layer-2 configurable features, both at synthesis time & during runtime, MTSN allows building advanced Ethernet switch systems with TSN capabilities. MTSN switch has been designed to address the maximum throughput using optimized resources.

All these characteristics enable a wide number of applications/sectors where the use of MTSN IP Core is key. Automotive, Marine, Aerospace, Defence or Electric are examples of markets where our customers are already applying this technology.

KEY FEATURES

1. Time-Sensitive Networking (TSN) support

Aligned with the different TSN profiles, such as Aerospace (P802.1DP), Automotive (P802.1DG) or Industrial Automation (IEC/IEEE 60802).

2. Ethernet Switch IP “builder”

Hundreds of user-configurable parameters allow obtaining the exact switch configuration required by the customer, ensuring efficient use of the available programmable logic resources.

3. Different Data-Rate Per Port

Each port speed and interface can be assigned independently.

4. High Performance

Up-to 1G interfaces without HOL (Head-of-line) blocking effect.

5. Fast & Smooth Integration

GUI available for some FPGA vendor tools (i.e., AMD Vivado™ Design Suite). Drivers & software components included as part of the product deliverable.

6. Evaluation Version Available

Encrypted, time-limited version available.

Technical Specifications

Communication Interface

  • Integrated 10M/100M/1000M MACs for 10/100 Mbps and 1 Gbps PHY interface rates to use with any PHY interface type (e.g. MII, RMII, GMII, RGMII) depending on application
  • Compatible with SGMII (Serial Gigabit Media Independent Interface) or QSGMII (Quad Serial Gigabit Media Independent Interface) PHY interfaces through an internal GMII-based connection to AMD LogiCORE™ SGMII/QSGMII IP cores
  • 10/100/1000 Mbps AXI-Stream interface with a data width of 8 bits @ 125 MHz

Time Sensitive Networking (TSN)

  • TSN features can be enabled/disabled independently
  • IEEE 802.1AS – Timing and Synchronization (gPTP)
  • IEEE 802.1Qav – Credit Based Shaper (CBS)
  • IEEE 802.1Qbv – Time Aware Shaper (TAS)
  • IEEE 802.1Qci – Per-Stream Filtering and Policing (PSFP)
  • IEEE 802.1CB – Frame Replication and Elimination for Reliability (FRER)
  • IEEE 802.1Qbu / IEEE 802.3br – Frame Preemption
  • IEEE 802.1Qcc – Stream Reservation Protocol (SRP) Enhancements & Performance Improvements

Time Synchronization

  • Time Synchronization according to IEEE 802.1AS-2020 and IEEE 1588 (PTP)
    • Up to four IEEE 802.1AS time domains
  • Legacy PTP: IEEE 1588 Boundary Clock (BC) at Layer-2 and Layer-3 (IPv4)

Traffic Management

  • Integrated Ethernet switch fabric supporting up to 32 ports (number limited by device resources)
  • HoL (Head-of-Line) blocking-free switch fabric
  • Shared Dynamic and Static Filtering Database. Hardware MAC learning/ageing and look-up for up to ~9K MAC addresses (synthesis scalable) at wire speed
  • Independent VLAN Learning support
  • Searchable MAC addresses and associated info in Filtering Database
  • Programmable Frame Forwarding port mask
  • Programmable Ethertype-based Frame Forwarding
  • Static Multicast frame filtering; IGMP v1/v2 snooping (IPv4)
  • Standard frame size (1518 bytes) and Jumbo frames up to 9 kB (memory dependent)

Quality of Service

  • Up to 8 priority queues per port (synthesis option)
    • Priority classification based on PCP (802.1p), DSCP (IPv4 TOS / IPv6 COS), and EtherType
    • Programmable remapping from PCP/DSCP to internal queues per-port
    • Programmable priority regeneration per-port
    • Egress prioritization via Strict Priority or Weighted Round Robin (WRR)
  • IEEE 802.1Q tag-based and port-based VLANs; VLAN insertion (rx) and removal/overwrite (tx)
  • MAC-level ingress frame filtering (dest MAC and/or EtherType) per-port
  • Token-bucket based ingress throughput rate limiting per-port
  • MAC-level ingress frame rate limiting per-port
  • Credit Based Shaper (CBS) egress throughput rate limiting per-port
  • Egress frame rate limiting per-port
  • Broadcast/Multicast storm protection

Network Management & Monitoring

  • IEEE 802.1D STP, 802.1w RSTP, 802.1s MSTP
  • Multisession port mirroring: ingress & egress; option to mirror only frames matching a data pattern
  • User/network port-level security via IEEE 802.1X and MAC-based filtering
  • Host access control by destination MAC and/or Ethertype
  • Per-port MAC and switch statistics
  • Multiple management interfaces for control/statistics registers (selectable at synthesis)
  • I2C master interface for external device configuration (e.g., EEPROM with non-volatile config)

Others

  • Distributed Switch Architecture (DSA) frame tagging for app-specific message merging/distribution
  • Exclusive forwarding of known protocol-specific or custom frames to/from management port

 

 

More Articles …

  1. RELY-TEST
  2. RELY-REC
  3. RELY-TSN4
  4. RELY-TSN12